Charles Moore

Charles Moore is a Senior Fellow at Advanced Micro Devices, and currently the Chief Engineer of AMD's next-generation processor design. Prior to joining AMD, Mr. Moore was a Senior Research Fellow at the University of Texas at Austin where he did research on technology scalable computer architecture. Before then, Chuck was a Distinguished Engineer at IBM, where he most recently was the chief engineer on the POWER4 project. While at IBM, he was elected to the IBM Academy of Technology and was named an IBM Master Inventor.

Chuck has been granted 29 US patents, along with several others pending. He has published numerous conference papers and articles on a wide range of subjects related to computer architecture and design. He is on the editorial board for IEEE Micro magazine, and the program committee for several important industry conferences. Mr. Moore holds a master's degree in electrical engineering from the University of Texas at Austin, and a bachelor's degree in electrical engineering from the Rensselaer Polytechnic Institute. 

A Framework for Innovation-Abstract
The computer industry is driven by a virtuous cycle of adding value to entice new purchases, which then fuel the technology development process that ultimately offers new value. In recent years, we have seen a decline in the rate of improvement on several traditional drivers of value in computer systems, namely transistor performance, wire delays, the return on deep pipelining, and techniques for extracting high numbers of instructions per cycle. As new techniques for adding value are explored, there are some important questions about the hardware/software contract, complexity management, and overall system-level maturity that come into play. In this talk, I will highlight the implications of some of these shifts and make some observations about the emergence of a new framework for future innovation. In describing this framework, I will also suggest some of the interesting challenges that industry practitioners and academics will face as we collectively formalize the new system architecture stack.