André Seznec Receives the 2025 ACM-IEEE CS Eckert-Mauchly Award
Seznec Recognized for Foundational Work in Branch Prediction and Cache Memories
New York, NY, June 17, 2025 – ACM, the Association for Computing Machinery, and IEEE CS, the Institute of Electrical and Electronics Engineers Computer Society, have announced that André Seznec is the recipient of the ACM-IEEE CS Eckert-Mauchly Award. Seznec, a Fellow Research Director at INRIA/IRISA and a Fellow at SiFive, is recognized for his extensive impact on computing, most notably pioneering contributions to branch prediction and cache memories.
Seznec’s inventions can be found in billions of CPUs worldwide. These include the TAGE branch predictor and skewed-associative cache. In fact, Seznec’s work has served as a gold standard of branch prediction for the last 15 years, with most current structures in industrial designs rooted in his trailblazing contributions.
His early contributions were in vector architectures, particularly the memory system. Since the early 1990s, his main research activity has been focused on the architecture of microprocessors, including caches, pipelines, branch predictors, speculative execution, multithreading, and multicores. His research has influenced the design of many high-end industrial microprocessors, particularly the caches and the branch predictors.
Over the course of his career, Seznec has published more than 100 papers with many of his most notable contributions published solely under his name, demonstrating the profound impact he has had in solving some of the most challenging problems in computer architecture.
In addition, Seznec has been a dedicated supporter of industry education, collaboration, and advancement. He served multiple years on the organizing committee of the IEEE/ACM International Symposium on Computer Architecture (ISCA) acting as general chair in 2010 and program committee chair in 2016. He has also supported the future of computing as an educator, having graduated 28 PhD students from 1991 to 2020.
Biographical Background
André Seznec is a Fellow Research Director at INRIA/IRISA in Rennes, France, and a Fellow at SiFive, a US-based semiconductor company. He received a PhD in Computer Sciences from the University of Rennes, where he focused on processor architecture. Earlier in his career, he held positions at many leading companies including Arm, AMD, Apple, Intel, Compaq and Qualcomm.
Among his honors, Seznec is the 2020 recipient of the IEEE CS B. Ramakrishna Rau Award , which is given to those who offer substantial contributions in the field of computer microarchitecture and compiler code generation. He is a Fellow of IEEE and was selected as an ACM Fellow for contributions to branch prediction and memory design.
He will be formally recognized with the Eckert-Mauchly Award on Tuesday, June 24 at 10:30 am JST at ISCA 2025 in Tokyo, Japan.
About the ACM-IEEE CS Eckert-Mauchly Award
ACM and IEEE Computer Society co-sponsor the Eckert-Mauchly Award, which was initiated in 1979. It recognizes contributions to computer and digital systems architecture and comes with a $5,000 prize. The award was named for John Presper Eckert and John William Mauchly, who collaborated on the design and construction of the Electronic Numerical Integrator and Computer (ENIAC), the pioneering large-scale electronic computing machine, which was completed in 1947.
About ACM
ACM, the Association for Computing Machinery, is the world's largest educational and scientific computing society, uniting educators, researchers, and professionals to inspire dialogue, share resources, and address the field's challenges. ACM strengthens the computing profession's collective voice through strong leadership, promotion of the highest standards, and recognition of technical excellence. ACM supports the professional growth of its members by providing opportunities for life-long learning, career development, and professional networking.
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